PMC-VFX70
Download datasheet: PMC-VFX70 (262,04 KB)

Features

  • PCI-X bus 100MHz 64-bit interface
  • Supports both front and rear I/O connections
  • 64 I/O or 32 LVDS lines direct to FPGA via rear (J4)
  • Plug-in I/O modules are available for front mezzanine
  • FPGA code loads from PCI bus or 32MB flash memory
  • Two banks of 256K x 32-bit dual-ported SRAM
  • Two banks of 64M x 16-bit DDR2 SDRAM
  • Other memory options available (contact factory)
  • Supports dual DMA channel data transfer to CPU/bus
  • Supports 3.3V signalling
  • Support for Xilinx ChipScope™ Pro interface
  • Conduction-cooled or -40 to 85°C operating range
  • Acromag AXM I/O modules:for front mezzanine:
    AXM modules attach to the board for additional I/O lines.
  • Analog and digital I/O AXM modules are sold separately.
  • Rear I/O:
    64 I/O (32 LVDS) lines supported with a direct connection between the FPGA and the rear I/O connector (J4).
  • PMC Compliance:
    Conforms to PCI Local Bus Specification, Revision 3.0 and CMC/PMC Specification, P1386.1.
  • Electrical/Mechanical Interface: Single-Width Module.
  • PCI Bus Modes: Supports PCI-X at 100MHz, 66MHz and
  • Standard PCI at 66MHz and 33MHz
  • PCI-X Master/Target: 32-bit or 64-bit interface
  • Signaling: 3.3V compliant.
  • Interrupts (INTA#): Interrupt A is used to request an interrupt.
  • Environmental
  • Operating temperature: 0 to 70°C or -40 to 85°C (E versions)
  • Storage temperature: -55 to 105°C.
  • Relative humidity: 5 to 95% non-condensing. Reconfigurable Xilinx Virtex-5 FPGA
  • FPGA: Xilinx Virtex-5 FPGA XC5VFX70T FPGA with 71,680 logic cells and PowerPC processor block
  • FPGA configuration: Download via PCI bus or flash memory.
  • Example FPGA program: VHDL provided for local bus interface, control of front & rear I/O, SRAM read/write interface logic, and SDRAM memory interface controller.
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